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IPFlex and Fujitsu Introduce DAP/DNA®-2, The Dynamically Reconfigurable Processor

World's First Commercialization of Reconfigurable Chip Technology

Tokyo, March 17, 2004 -- IPFlex Inc. and Fujitsu Limited today announced the commercial release of their jointly developed processor, the DAP/DNA®-2 (Digital Application Processor/Distributed Network Architecture), which features a unique ability to dynamically reconfigure its internal circuitry. Employing the newly developed processor enables systems to perform multiple processing tasks with a single-chip solution that previously required several specialized chips.

The DAP/DNA®-2 is the first commercial, general-use dynamically reconfigurable processor in the world. In recent years, there has been a strong demand for logic devices that can flexibly be applied to satisfy various product specifications as well as shorten the product development time. DAP/DNA-2 offers the next-generation solution architected to meet these needs

From the early stages of DAP/DNA development, IPFlex has been building partnership with Fujitsu on the physical design and manufacturing. In December 2002, the two companies formed an equity collaboration and further tightened the relationship for their joint development work.

In December 2003, Fujitsu acquired a technology license for the dynamically reconfigurable processor from IPFlex, making Fujitsu its first strategic partner in development, manufacturing, and sales activities. The two companies plan to continue improving the performance and applicability of this technology and to extend it into Fujitsu's system-on-chip (SoC) products.

The DAP/DNA-2 is the first product to use dynamic reconfiguration technology, enabling customers to accelerate their product development cycle and reduce their development costs.

DAP/DNA-2: Key features

The DAP/DNA-2 is the first commercialized version of the DAP/DNA series, and combines IPFlex's logic design with Fujitsu's physical design and manufacturing capabilities. Among its key features are the following:

  • Instantly reconfigures internal circuitry

    The DAP/DNA-2 is a microprocessor that contains multiple processing elements (PEs) and can optimally configure internal circuits to best suit the application in demand. The function of each PE, as well as connections among PEs, can be reconfigured not only when building the system, but also when it is running, enabling instant (within one clock cycle) reconfiguration to suit the application at hand. The DAP/DNA-2 lays out these PEs in a two-dimensional array so that it can quickly and flexibly change their function and the connections between them.

  • Dramatically reduces product development time and costs

    Using dynamic reconfiguration technology makes it possible to process multiple functions with a single DAP/DNA-2 that previously required several specialized chips. DAP/DNA's integrated development environment enables algorithm development in high-level languages. This capability increases design productivity, shortens the development time and slashes cost.

  • Availability of DAP/DNA-FW II integrated development environment

    DAP/DNA-FW II, a dedicated integrated development environment for the DAP/DNA-2, is released in Japan today. DAP/DNA-FW II is a sophisticated set of tools that handles every step of the development process, from algorithm design to actual device implementation. Moreover, the addition of new DNA Designer module makes it possible to design algorithms graphically. The software has interfaces to high-level languages, and supports The MathWorks' MATLAB®/Simulink®. This feature helps shorten the development process and give designers a significant boost in productivity.


The DAP/DNA-2 is a dual-core processor: DAP refers to the high-performance RISC core, and DNA to a two-dimensional matrix of PEs.

The main specifications are as follows:
  • Processing elements (PE): 376, operating at 166 MHz
  • On-processor data memory: 576 KB
  • DNA configuration data: Stored in four banks (one foreground bank, three background banks). Additional configuration data can be loaded from external memory.

Pricing and Availability

Both partners are taking orders for DAP/DNA-2 beginning March 17, and expect to begin shipping sample quantities in Japan in mid-May. Please contact the companies directly for a quote on the DAP/DNA-2. The DAP/DNA-FW II is available in Japan for 3.5 million yen (excl. tax).

Trademark notice

IPFlex®, DAP/DNA®, and Software to SiliconR are all registered trademarks of IPFlex Inc. All other company names and product names mentioned herein are the trademarks or registered trademarks of their respective firms.

About IPFlex
IPFlex was founded in March 2000 as a fabless semiconductor company focused on developing dynamically reconfigurable processors and its integrated development software. DAP/DNA (Digital Application Processor/Distributed Network Architecture) dynamically reconfigurable processor is designed as a dual-core processor comprised of a high-performance RISC core (DAP) and a dynamic reconfigurable processor core (DNA), and it is a platform that provides hardware performance while maintaining software flexibility. The DAP/DNA dynamic reconfigurable processor series is provided with the DAP/DNA-FW II as the integrated software development environment. It provides compilers for algorithms written in MATLAB/Simulink and C with data flow extension, thus realizing high-abstraction level algorithm design as well as leveraging existing intellectual properties of users. Using DAP/DNA can dramatically increase programming productivity and cut cost considerably. For more information, please see :

About Fujitsu
Fujitsu is a leading provider of customer-focused IT and communications solutions for the global marketplace. Pace-setting technologies, highly reliable computing and telecommunications platforms, and a worldwide corps of systems and services experts uniquely position Fujitsu to deliver comprehensive solutions that open up infinite possibilities for its customers' success. Headquartered in Tokyo, Fujitsu Limited (TSE:6702) reported consolidated revenues of 4.6 trillion yen (US$38 billion) for the fiscal year ended March 31, 2003. For more information, please see :

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