Tokyo, February 9, 2001---Fujitsu Laboratories, Ltd., Fujitsu Laboratories of America, Fujitsu, Limited and Integration Corp. of Berkeley, California have jointly developed a low power-consumption, high speed logic circuit technology using an SOI (Silicon on Insulator) substrate and combining low swing voltage circuit technology and charge recycling technology. This new circuitry can be used for 32-bit adders, an important component of CPUs and other devices, and it has been confirmed that, in comparison with conventional CLA (Carry Look Ahead) technology, power consumption in reduced by half while maintaining a comparable operating speed.
Background
In recent years, LSI process technology has made great strides, with reduced transistor size and a remarkable increase in the number of transistors that can be mounted on a single chip. As a result, while power supply voltage has become lower year-by-year, electric power consumption continues to grow. Indeed, power consumption concerns have become a limiting factor in the design of LSIs used in microprocessors that require large-scale, high-speed processing. Thus, reducing power consumption has become a major priority throughout the field of LSI-related development, ranging from computer systems to circuit and device technologies.
Attempts to restrain power consumption while reducing power source voltage have been made before, however, this has resulted in a decline in transistor current drivability that has in turn slowed down the circuit's operating speed. Under the circumstances, there is a pressing need for circuit technology that can reduce energy consumption as well as source voltage without sacrificing operating speed.
SOI transistors are attracting attention as a key technology, not only because of their speed but also their low energy use characteristics. This is because in SOI technology, parasitic capacitance components unrelated to the transistor's operation can be so small as to be negligible in comparison with conventional transistors. However, when using SOI transistors, the body voltage, which is used as fixed voltage, enters into a floating state that can create flaws (history effect) in the circuit's operation. Overcoming this problem has been a major challenge in developing SOI technology.
Development Details
The newly developed low-power-consumption circuit technology succeeds in combining low swing voltage circuit technology and charge recycling technology. Low swing voltage circuit technology seeks to reduce power consumption by reducing output voltage amplitude only, while maintaining supply voltage at former levels. Since it is not necessary to reduce input voltage for transistors performing logic operations, it is possible to keep operating speeds at levels equivalent to conventional transistors without sacrificing operating ability. In addition, since static circuit technology is used, in which the transistors are constantly in contact with the power supply or the ground, low swing voltage circuits are in theory resistant to noise and easy to design in comparison to using dynamic circuit technology.
In charge recycling technology, the charge used to drive the transistor is held and, before the next operation, the transistor's source and drain are returned to the same voltage level by a process of equalization. In this way, the electrical power is reused. When this technology is used for many transistors - and by reusing the electrical charge to the maximum degree - it is possible to reduce overall power consumption. The newly developed SOI chip achieves a 24% reduction in power consumption. In addition, thanks to the small operating amplitude and equalization of electrical potential at each cycle, changes in substrate electrical potential are minimal. Thus, history effect is reduced, and variations in operating speed are controlled.
The figure here shows a 32-bit adder that uses this method. Investigation of the adder's performance found that, in terms of power delay product, the low swing voltage circuit's power consumption was half that of conventional adders and high-speed performance was possible. Moreover, it was verified that adopting the charge recycling method made possible an additional 10% saving in power consumption.
Terminology
- SOI (Silicon on Insulator) - Ordinarily, transistors are formed directly on a silicon substrate. In the case of SOI, because they are formed on an insulator (SiOx or A1203), source drain capacitance not related to the operation of the circuit is reduced, and it is possible to make the circuit faster as well as reduce its energy consumption.
- CLA (Carry Look Ahead) Adder - An adder that carries first, making possible high-speed operation.
- Static Circuit and Dynamic Circuit - In static circuit operation, all output nodes pass through the attached operation transistors, and they must be attached to power or ground. In general, static circuits are resistant to noise. With dynamic circuits, on the other hand, one or more nodes are in a floating state during operation. They are generally vulnerable to noise within the LSI and require much care to design.
- Power Delay Product - The product of operation time and electric power consumption. When this figure is lower, power consumption is lower and high-speed operation possible.
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About Fujitsu
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About Fujitsu Laboratories Ltd.
Founded in 1968 as a wholly owned subsidiary of Fujitsu Limited, Fujitsu Laboratories Limited is one of the premier research centers in the world. With eight laboratories in Japan, one in China and one in the United States, the organization conducts a wide range of basic and applied research in the areas of Multimedia, Personal Systems, Networks, Peripherals, Advanced Materials and Electronic Devices.